dsp core - SNR of a 16-bit DSP with 12-bit ADC, 40-bit accumulator

According to the 6dB-per-bit rule, a 16-bit DSP would provide 96 dB of dynamic range, approximately.

If the ADC and DAC are both 12-bit long, the DSP is still considered to have 96 dB, or the dynamic range is now 72 dB?

Also, I would like to know if the guard bits provided by the accumulator (40-bit) increase in some way the dynamic range.

Thank you very much.

Answer

The dynamic range is the ratio between maximum and minimum representable values. It is $DR = max/min$. So:

1. 
   
   

   For an ADC and its configuration (Vref, uniform step, ENOB, etc...), as you said, $DR = 6 \cdot N $, where $N$ is the ENOB of the ADC. However, you can vary the configuration of the ADC stage to adapt it to your signal. So, at each moment, an ADC can have different $min$, $max$ or $DR$ by changing its configuration (in real-time or off-line) at the expense of other metrics (quantization noise mainly). For example, if you have an ADC that does not perform an uniform quantization, you could increase the DR. The reason why uniform quantization is the most common among ADCs is because no statistics about the signal to be sampled is available to the ADC designer, for some signals, however, uniform quantization is not the best.

   
   


2. 
   

   A DSP can perform arbitrarily high dynamic range operations with proper software the same way it is possible to perform 1024-bit arithmetic in a 32-bit register machine. Even if the ADC data has DR=96dB, internally, the DSP can raise that DR as much as resources it has. For example, if two number with DN=96dB are multiplied, you get a result with DR=192dB as long as you store all the result bits. If your accumulator cannot handle such number of bits, you can always make arithmetic transformations over your computation not to saturate the accumulator.

   
   


3. 
   

   The guard bits in the accumulator helps not to make those arithmetic transformations for reasonable DRs along the data flow (intermediate results) of the algorithm.

   
   

So, to answer to your only question: the DR of a DSP is arbitrary (only constrained by software algorithms, memory to store the programs, real-time constraints...), with the information you provide is not possible to give an answer. On the other hand, a 12-bit ADC has not necessarily a DR=72dB, but for the vast majority of ADCs out there (uniform quantization) it is like that.